Most currently available video cameras use charge coupled devices (CCDs) for generating video images. Although these cameras are suitable for many applications, the relatively high cost of CCD-based camera technology limits its use in high volume commercial markets, such as personal computer teleconferencing, for example.
The higher cost of CCD camera systems results from a combination of factors, such as many mask levels for CCD processes; lower yields for the photosensor due to high complexity; shared pixel real estate for the photosensor and CCD shift register, which requires micro-optics or alternative die-area doubling frame transfer schemes (or otherwise limits the optical fill factor); front-illuminated designs that may require photodetection through overlying polysilicon layers, which generally degrade response in the blue and near-UV regions of the spectrum; complex interface and signal processing electronics that may not be compatible with battery operation; support electronics functions that are not readily integrated onto the CCD imager; and interface electronics that require high voltage clock drivers and DC biases to operate the CCD and the video signal conditioning amplifier (including correlated double samplers and other circuitry needed to manipulate the video into the proper protocol).
Various MOSFET-based alternatives to CCD sensors are also known in the prior art for lower cost applications. Hitachi, for example, has produced a MOS-based photodiode imaging array for high-volume applications, including camcorders (Hitachi Part No. HE98221). This basic scheme, commonly referred to as a passive pixel sensor, typically includes an array of pixels connected to an amplifier by horizontal and vertical scanners. Each passive pixel (i.e., having no pixel-based amplification) comprises a silicon photodiode and a pixel access transistor.
Early passive pixel devices fabricated using n-MOS technology were not competitive with emerging CCD-based imagers, except for niche applications such as spectrometry, because the read noise (including blooming and fixed pattern noise) was too high. Furthermore, the circuitry servicing each column did not adequately extract the low-level signal current in the presence of switching noise, vertical smear noise, and random noise. The column buffer, generally comprising a bipolar transistor in emitter follower configuration with a correlated double sampler, typically yielded temporal and fixed pattern noise that was about an order of magnitude higher than that produced by competing CCDs. Nevertheless, companies such as EG&G Reticon continue to produce MOS photodiode arrays having passive pixel designs with various multiplexing schemes.
The advantage of producing imagers using conventional MOS fabrication technologies, rather than esoteric CCD processes requiring many implantation steps and complex interface circuitry, has led to successive improvements. The column buffer was refined by using an enhancement-depletion inverter to provide greater amplification with a small area of wafer "real estate." The amplifier gain effectively reduced the column capacitance, and thus suppressed kTC noise and pattern noise. Low-light level performance was improved by about a factor of three (to a minimum scene illumination of 40 lux) relative to previous MOS imagers.
Subsequently, amplification was relocated to the pixel by means of a phototransistor. Cell-based amplification imagers are sometimes referred to as active pixel sensors. The Base-Stored Image Sensor (BASIS) used a bipolar transistor in emitter follower configuration, with a downstream correlated sampler, to suppress random and temporal noise. By storing the photogenerated signal on the phototransistor's base to provide cell-based charge amplification, the minimum scene illumination was reduced to 10.sup.-3 lux in a linear sensor array. The minimum scene illumination was higher (.apprxeq.0.01 lux) in a related two-dimensional BASIS imager having 310,000 pixels because the photoresponse nonuniformity was relatively high (.ltoreq.2%). Although this MOS imager had adequate sensitivity, the pixel pitch was considered too large (at about 13 .mu.m).
An active pixel sensor comprising a three-transistor pixel is described in U.S. Pat. No. 5,296,696 (Uno). The cell-based source-follower amplifier is augmented with a CMOS column buffer providing fixed pattern noise cancellation. In this scheme, at least one of the three transistors in the pixel is relatively large to minimize amplifier 1/f noise. A large S/N ratio with low pattern noise can be achieved, but the pixel optical fill factor is relatively small.
A compact passive pixel image sensor that can be fabricated using various technologies, including CMOS, NMOS, Bipolar, BiMOS, BiCMOS, or amorphous silicon, is described in U.S. Pat. No. 5,345,266 (Denyer). Denyer buffers the output signal from the passive pixels with charge-integrating column amplifiers to extract the signal from each pixel. However, Denyer does not disclose circuitry to minimize vertical streak noise, minimize random thermal noise, suppress fixed pattern noise, or improve testability.
Because of the complexity and relatively high cost that limit use of CCD-based imaging systems in high volume commercial markets, and the limitations of prior art active and passive pixel sensors, there is a need for new electronic imaging systems that offer significant reductions in cost and power requirements. Because the amplification requirements of a sensor system are quite formidable, considering the small charge originating at each pixel within an array, the amplifier design, whether realized in on-chip or external circuitry, must be rather sophisticated.